What was the first Intel x86 processor with “Base + Index * Scale + Displacement” addressing mode?












3















As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



mov %reg, 8(base, index, 4)
^^^^^^^^^^^^^^^^^


where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?










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    Apr 28 at 0:18


















3















As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



mov %reg, 8(base, index, 4)
^^^^^^^^^^^^^^^^^


where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?










share|improve this question


















  • 1





    Downvote button says "This question does not show any research effort" so that's what I'm clicking. Stack Exchange is not supposed to be the first stop.

    – pipe
    Apr 28 at 0:18
















3












3








3








As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



mov %reg, 8(base, index, 4)
^^^^^^^^^^^^^^^^^


where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?










share|improve this question














As the title says, what's the first x86 processor from Intel that supports the following addressing mode?



mov %reg, 8(base, index, 4)
^^^^^^^^^^^^^^^^^


where the content of %reg will be stored to the address base + 4*index + 8 (both base and index are registers).



I only know that 8086 doesn't support this and 80586 supports this. I'm guessing it's 80386 because it's the first 32-bit x86 Intel CPU?







intel x86






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asked Apr 27 at 12:40









iBugiBug

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  • 1





    Downvote button says "This question does not show any research effort" so that's what I'm clicking. Stack Exchange is not supposed to be the first stop.

    – pipe
    Apr 28 at 0:18
















  • 1





    Downvote button says "This question does not show any research effort" so that's what I'm clicking. Stack Exchange is not supposed to be the first stop.

    – pipe
    Apr 28 at 0:18










1




1





Downvote button says "This question does not show any research effort" so that's what I'm clicking. Stack Exchange is not supposed to be the first stop.

– pipe
Apr 28 at 0:18







Downvote button says "This question does not show any research effort" so that's what I'm clicking. Stack Exchange is not supposed to be the first stop.

– pipe
Apr 28 at 0:18












1 Answer
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This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



Ref: 80386 Programmer's reference manual sec 2.5.3.2.






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    11














    This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



    Ref: 80386 Programmer's reference manual sec 2.5.3.2.






    share|improve this answer




























      11














      This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



      Ref: 80386 Programmer's reference manual sec 2.5.3.2.






      share|improve this answer


























        11












        11








        11







        This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



        Ref: 80386 Programmer's reference manual sec 2.5.3.2.






        share|improve this answer













        This addressing mode was introduced with the first 32-bit x86 processor, i.e. the 80386.



        Ref: 80386 Programmer's reference manual sec 2.5.3.2.







        share|improve this answer












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        share|improve this answer










        answered Apr 27 at 13:01









        alephzeroalephzero

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